This invention pertains generally to a method for manufacturing integrated circuits that satisfy narrow design rules and more particularly to an improved thin layer imaging process for photoresist patterning in systems having low radiation flux and highly energetic, strongly attenuated radiation.
As integrated circuits have become smaller the demands to achieve submicron resolution with satisfactory line width control have become increasingly important. Design rules of 0.5 xcexcm are being replaced by design rules that require feature sizes of 0.25 to 0.18 xcexcm and significant effort is presently being put into achieving 0.1 xcexcm resolution.
Integrated circuits are manufactured using lithographic processes. Energy (generally electromagnetic radiation, i.e., light) is caused to interact selectively with an energy sensitive resist material deposited onto a substrate in such a way that a pattern or image is produced on the resist material. The resist material is developed and the pattern is transferred by etching onto the substrate.
The energy used to expose the resist material, the composition of the resist material, the thickness of the resist material, and many other factors affect the ability of a lithographic process to delineate a feature on a substrate. The smaller the design rule (feature size) the more precisely the feature must be delineated. This requirement, coupled with the demand for smaller feature sizes has driven the wavelength of radiation needed to produce the desired pattern to ever shorter wavelengths. Shorter wavelength light is strongly absorbed by the resist material and thus unable to penetrate much below the surface of the resist material. By way of example, the characteristic attenuation length for 13.4 nm radiation (the wavelength desired for 0.1 xcexcm feature size) is on the order of 0.1-0.2 xcexcm for most organic films. If a standard 0.5-0.8 xcexcm thick resist material is required for further processing it will result in a wall profile significantly less than 80 degrees and hence unacceptable critical dimension control.
The topography of the substrate surface may also adversely affect the ability of the lithographic process to define features on the substrate. When a single layer of resist material is applied over a nonplanar substrate pattern, light scattering by the resist material and substrate, as well as the potential inability of the light to completely penetrate and uniformly expose the resist material can result in errors in the defined lithographic pattern. Consequently, surface imaging lithographic processes have been developed that do not require that the resist material be exposed throughout its entire thickness. These processes are referred to as surface imaging processes because they define features only in the near surface region of the resist.
While surface imaging is absolutely required for patterning advanced integrated circuits using highly attenuated radiation, the technology may also offer advantages in any case of narrow design rules where standard lithographic processes are difficult due to severe wafer topography or radiation reflection or depth of focus (DOF) limitations since imaging just the surface of the resist relaxes DOF requirements. High numerical aperture steppers, while capable of printing smaller features at a given wavelength, often have small DOF and this can preclude focused exposure through the thickness of the film. By providing a planarizing layer disposed between the surface of the substrate and the imaging layer, it is possible to deposit a uniform imaging layer having minimum thickness, thereby reducing problems associated with variations in DOF.
Four basic surface imaging technologies are well known in the art; single layer silylation processes, bilayer processes, trilayer processes, and a variation of the standard bilayer process in which the topmost resist layer is reactive to a silylation reagent.
In the standard bilayer process a relatively thick layer of resist material (typically 1.5-4 times the height of the highest step on the substrate) is deposited on the surface of a substrate as a planarizing processing layer. A second imaging resist layer is spin cast onto the surface of the planarizing layer. A circuit pattern is produced on the surface of the resist material which is subsequently developed, exposing portions of the underlying planarizing layer. The mask pattern is transferred from the imaging layer directly onto the surface of the substrate by etching through the planarizing layer by standard device processing. Bilayer systems have not found ready acceptance for high volume applications due to their processing complexity and expense.
Trilayer resist processes incorporate a highly etch resistant layer i.e., xe2x80x9chardxe2x80x9d layer, between the two resist layers of the bilayer process. Typically, this intervening hard layer is composed of a sputtered metal or a refractory material such as silicon dioxide, which can either be applied through a conventional chemical vapor deposition processes or by a liquid deposition process wherein silicon dioxide particles or silicon containing polymer, oligomers or clusters are suspended or dissolved in a liquid that desirably evaporates quickly to leave a glass-like layer referred to as spin-on-glass (SOG). While the trilayer process has eliminated many of the problems encountered with the bilayer process, other complications are associated with this process. For example, the susceptibility of the silicon dioxide hard mask layer to internal and surface defects caused by agglomeration of silicon dioxide particles or cracking of the hard mask layer due to internal stresses limit the usefulness of this process. The defect density associated with the application of a very thin imaging layer over an often rough middle layer is also a major issue for the trilayer process.
Another approach to imaging a circuit pattern onto a substrate involves introducing silicon into the surface layer of a resist material after exposure as described by Coopmans, et al. xe2x80x9cDESIRE: A New Route to Submicron Optical Lithographyxe2x80x9d, Solid State Technology, pp. 93-97, June 1987. In this process a resist material is coated onto a substrate or an intervening planarizing layer and a circuit pattern is produced on the resist material by a standard UV exposure. The exposed wafer is subjected to silylation by either a gaseous or liquid silicon containing compound such as hexamethyldisilizane (HMDS) or silicon tetrachloride, whereby silicon is incorporated into the polymer. Depending upon the changes in the resist material caused by exposure to UV the silylating reagent can be incorporated either into the exposed or unexposed regions of the resist material. Silicon which has been incorporated into the resist material will be converted to an etch protective oxide when exposed to the oxygen etch process of the pattern transfer step. Consequently, the silylated regions of the polymer will etch at a significantly slower rate than the unsilylated regions.
Exposure to UV light can cause reactive groups to form in the resist material which react selectively with a silylating reagent such as disclosed in U.S. Pat. No. 4,751,170. Depending upon the composition of the resist material, exposure to UV light can cause the resist material to crosslink and/or form groups that react selectively with silylating agents as disclosed in U.S. Pat. Nos. 5,487,967 and 5,550,007. Diffusion of the silylating reagent is inhibited by the crosslinked regions of the resist material. Thus, those areas of the resist material that are crosslinked will be more easily etched. A modification of this process is disclosed in U.S. Pat. No. 4,931,351, wherein the resist material is first conventionally exposed to radiation, then developed by contacting the exposed resist material with a suitable developer known to those skilled in the art, such as tetramethylammonium hydroxide (TMAH) and the like, and then exposed to UV light to enhance reaction of the resist material with a silylating reagent to produce an etch resistant silylated resist material.
In another embodiment, a polysiloxane material is employed as a resist material, J. Shaw et al., xe2x80x9cPolysiloxanes for Optical Lithographyxe2x80x9d, Solid State Technology, pp. 83-89, June 1987. Here exposure to deep UV (light having a wavelength less than about 270 nm) causes the polysiloxane material to crosslink reducing its solubility. The unexposed material is removed by rinsing with an organic solvent.
U.S. Pat. Nos. 5,286,607, 5,486,424, and 5,545,512 disclose a further modification of the original silylation process. Here a first resist layer is applied to a substrate and exposed to radiant energy, generally UV radiation, to create an acid reaction product. The irradiated first resist layer is then softbaked and subsequently exposed to a silylating reagent, such as HMDS, for a period of time sufficient for the reagent to penetrate into the resist layer, typically ≈2000-3000 xc3x85. During the softbake step the resist layer can crosslink. The substrate can now be processed by standard methods, i.e., applying a second resist layer and forming a circuit pattern by conventional photolithographic and etching steps. After the circuit pattern has been formed on the second resist layer the substrate is subjected to a plasma etching step. The plasma etching step is composed of two parts. In the first part, exposed portions of the silicon enriched layer are removed using conventional silicon dioxide etching processes, such as the use of hydroflurocarbon gases. In the second part, the remaining portions of the second resist layer are removed by an oxidizing etch and the remaining portions of the first silylated resist layer are converted to silicon dioxide. The resulting silicon dioxide layer acts as a mask for etching the substrate.
While the use of silicon-based chemistry in top surface imaging (TSI) processes affords certain advantage in wafer processing, there are numerous disadvantages associated with the various aforementioned processes. The characteristics of the silylated layer largely determine the ultimate lithographic performance of the TSI process. Low silicon content contributes to low etch resistance and difficult CD control during etch. Large pattern distortion caused by swelling associated with incorporation of the silicon-containing reagent can also lead to loss of resolution and poor lithographic performance. On the other hand, incorporation of significant amounts of silylating reagent can lead to reduction of the glass transition temperature (Tg) of the polymer resist material leading to undesirable flow of the silylated resist and silylation in unwanted areas. Finally, in a TSI scheme resolution is limited by the size dependence of the silylation process wherein larger features are silylated more heavily than smaller ones which leads to insufficient silylation and thus loss of the silylated etch mask for features smaller than 0.1 xcexcm. Attempts to rectify this problem by increasing the silylation of smaller features also increases the silylation of the larger features leading to pattern distortion.
While the process of exposing a resist layer to radiant energy followed by the step of exposing the entire resist layer to a silylation treatment affords some advantage over the more traditional silylation methods it too suffers from a significant limitation; a second resist layer must be spun onto the silylated resist layer. The use of a second resist layer to pattern the silylated resist layer can be undesirable in the case of deep or extreme ultraviolet lithography. Because radiation with a wavelength below ≈248 nm is strongly attenuated in organic resist material the resist layer must be relatively thin (typically less than 1000 xc3x85) in order to avoid sloping sidewalls. However, resist layers thinner than 1500-2000 xc3x85 are prone to pin hole and density defects arising from nonuniform coating of the substrate material. Moreover, the processes themselves are complex with a large number of processing steps.
From the foregoing it can be seen that with the trend toward narrower design rules there is a growing need for a lithographic method capable of producing high resolution submicron patterned resist images having excellent etch resistance and thermal and dimensional stability, that is compatible with existing resist materials and processing facilities, and affords convenient device processing.
The invention disclosed herein provides a novel method for resist patterning which is particularly advantageous for lithographic systems having low radiation flux and highly energetic, strongly attenuated radiation.
In contrast to prior art processes generally, wherein an in-situ etch mask is formed by introducing silicon into the resist material following exposure or pattern development, in the manner described above, the process disclosed herein first creates a thin imaging layer with uniform silicon distribution in a bilayer format. Pattern development then incorporates a de-silylation step, following exposure, that is self limiting due to the limited quantity of silyl groups within each region of the pattern. Further, the need for a second patterning resist layer is eliminated.
An imaging layer containing a resist material, preferably a polymeric resist material, that can contain a photoacid either by direct addition or by subsequent reaction and that can react with a silylating reagent, is deposited onto a substrate. The resist material is then exposed to a silylating reagent which penetrates into the resist material. The extent of the penetration will depend upon the silylation conditions, such as silylation time, the type of polymer resist material used, the temperature of the polymeric resist layer during exposure, and the type of silylating reagent used. Silylation can be accomplished either by reaction of the resist with the silylation reagent in the gas phase or in solution, either as a pure liquid or a solution of the silylating reagent in a suitable solvent, desirably a mixture of a nonsolvent and a solvent for the polymer resist material. Furthermore, the silylating reagent can be bifunctional or a combination of single and multifunctional silylation reagents. The crosslinking action of the multifunctional silylation reagents will provide a top layer with a higher glass transition temperature (Tg) and lead to improved imaging and decrease formation of volatile products.
A latent image, defined by the sum of exposed and unexposed areas on the imaging layer, is then transferred onto the imaging layer by exposing certain portions of the polymer resist material to radiation. Exposure can take place either by direct imaging through a mask or by radiation being reflected from a mask or reticle. Radiation incident upon the silylated resist material results in acid generation which catalyzes cleavage of Sixe2x80x94O bonds to produce moieties that are volatile enough to be driven off in a post exposure bake step, thereby desilylating the exposed areas of the resist material.
Another embodiment is contemplated wherein non-volatile silicon-containing fragments are generated by acid catalyzed cleavage of the resist polymer backbone. This cleavage reaction generates base-soluble groups thereby rendering the resist polymer itself base-soluble. The silicon containing moieties cleaved from the resist polymer can be removed by solution development employing a basic solution, for example TMAH or the like. Following the post exposure bake step, an etching step, generally an oxygen plasma etch, removes all the resist material from the de-silylated areas of the resist material and converts the top 50 xc3x85 of the remaining silylated resist material to silicon dioxide.